IP 검색 LC based All-Digital-PLL (차세대지능형반도체사업단) · PCIe interface system의 high frequency clock generation 지원 가능한 LC-ADPLL Feature · 16GHz clock generation with low phase noise· LC based ADPLL Application · SoC Business Area High-Speed SerDes Interface Category Other Tech Specs IP Name : LC based All-Digital-PLL (차세대지능형반도체사업단) Provider : Seoul National University Foundry : Others Technology : 7nm Deliverables · GDS, Verification testbench Validation Status · Full Simulation Availability Available Functional Diagram Benefits · low phase noise List Contact Provider 즐겨찾기 등록
