The "Unity-Gain Buffer" is a low-power, fully differential analog buffer IP designed for high-speed, low-distortion applications requiring voltage following with minimal offset and excellent linearity. The IP is composed of a differential-input, single-ended-output operational amplifier configured in a unity-gain feedback topology. Users must connect ‘Analog op-amp’ IP’s ports both VINN and VOUT together to use ‘Unity-Gain Buffer’.
The analog IP receives an input signal and outputs a single-ended signal that follows input signal. Internally, the design includes a compensation network optimized for unity-gain stability, ensuring no oscillation. Structurally, the amplifier consists of a PMOS input differential pair with active current mirror loads, followed by a single-ended gain stage that converts the differential signal to a single-ended output. A Miller or feedforward compensation path is included to guarantee sufficient phase margin in unity-gain buffer configuration and other closed-loop applications.
The buffer is designed with the feedback network determines the effective gain, while the amplifier ensures linearity and stability. No digital inputs or control interfaces are required, and the amplifier responds continuously to analog input variations. The IP Implemented in a 28 nm CMOS low power process.